Recently, battery packs including lithium-ion batteries are used in portable equipments, such as digital cameras. In general, it is regarded difficult to detect a remaining battery capacity from a voltage of the lithium-ion battery. For this reason, the remaining battery capacity is measured by detecting a charge or discharge current of the battery by a microcomputer, for example, and totaling the detected charge or discharge current.
A fuel gauge IC (Integrated Circuit) for measuring the remaining battery capacity in the above described manner may include an analog circuit such as a high-precision A/D (Analog-to-Digital) converter, and a digital circuit such as a CPU (Central Processing Unit) to total the measured current values and a timer, that are provided in a 1-chip semiconductor integrated circuit device.
Among the circuits provided in the 1-chip semiconductor integrated circuit device, noise caused by charging or discharging, flow-through current, and harmonics may be generated in the digital circuit in synchronism with a clock. The noise generated within the digital circuit propagates to a semiconductor substrate within the chip, and enters the analog circuit that is formed by the high-precision A/D converter and the like, to deteriorate the precision of the A/D conversion.
On the other hand, there are demands to reduce the chip size of the fuel gauge IC due to the reduced size of recent battery packs. But due to the small chip size of the fuel gauge IC, the effects of the noise have become even greater, and it has become difficult to provide circuits and electronic parts for the noise countermeasures. Such a trend is not limited to the fuel gauge IC, but is a common problem to be solved in semiconductor devices in which the analog circuit and the digital circuit coexist.
FIG. 1 is a plan view of a layout structure of an example of a conventional semiconductor integrated circuit device. In FIG. 1, a semiconductor integrated circuit device 1 includes an analog circuit region 2 and a digital circuit region 3 that are separated. The analog circuit region 2 and the digital circuit region 3 are separated by a distance D1.
The analog circuit region 2 includes a region 2a in which a delta-sigma modulator is formed, a region 2b in which an oscillator circuit including a PLL (Phase Locked Loop) is formed, a region 2c in which a sensor is formed, and the like. The analog circuit region 2 is segmented into regions for each function of the circuit or element.
In order to suppress mixing of noise from the digital circuit to the analog circuit, a first well and a second well are independently formed on a surface of the semiconductor substrate. The digital circuit is formed within the first well, and the analog circuit is formed within the second well, such that the resistivity of the semiconductor substrate is 1000 times that of the first well or higher. Such a structure is proposed in a Patent Document 1. In addition, a Patent Document 2 proposes a structure in which a digital circuit region and an analog circuit region are provided on a silicon substrate, and a guard ring region is provided in a ring-shape to surround an outer peripheral part of the digital circuit region.